UVM Verification Engineer

Irvine, CA | Contract

Job ID: 19480 Category: Engineering
Id: 19480
Category: Engineering
Location/City: CA - Irvine
Job Type: Contract
Region: Pacific

Meridian Technology Group is seeking a UVM Verification Engineer.

Due to ITAR requirements, only US Citizens or Green Card holders are eligible for consideration. Additionally, F-1 Visa holders are NOT eligible for consideration. 

The ideal candidate for UVM Verification Engineer will possess the following:
  • At least 5 years of System Verilog experience in an UVM development environment.
  • Excellent communication and documentation skills.
  • Ability to develop functional validation tests to verify systems will meet design requirements.
  • Ability to create test plans for RTL validation, defining and running system simulation models, collecting coverage report, and finding and implementing corrective measures for failing RTL tests.
  • Can analyze and use results to modify testing.
Responsibilities will include but are not limited to:
  • Develop the actual OVM/UVM DV Agent (Monitor, Driver, ScoreBoard).
  • Develop the actual DV test.
  • Collecting and Closing on all functional coverage analysis and enhance the test case to cover the coverage gap.
  • Manage and track verification development schedules
Skills required:
  • BS Electrical Engineering, MS Electrical Engineering, PhD in Computer Science or BSCS.
  • 5+ years of experience VMM/OVM/UVM development in verification on unix based platforms
  • Building complete UVM based test bench environments from scratch.
  • Developing Drivers, Monitors, Sequencers, Agents, Scoreboards, Checkers, etc
  • 5+ years of proficiency in OVM/UVM/SystemVerilog and simulation on a UNIX based development platform
  • Proficient in System Verilog
  • Team Leadership & project ownership, the candidate must have lead verification teams of 3 or more in the past.
  • 5+ years of experience in Code coverage, also constrained random and directed test development and coverage specification and analysis
  • Experience with automated regression test development
  • Detailed experience in shell programming language such as bash, csh, KSh, sh
  • Detailed experience in scripting language such as Perf, Perl, TCL, SED, Python, make file, etc.
  • ASIC test plan development, definition, and specification
  • BFM development for a wide variety of common embedded processors
  • Must have verified at least 5 production ASICs
  • Experience with emulation platform (like Mentor Veloce or Cadence Palladium)
  • Experienced with porting other language models (like Matlab Models) in verification environment
Additional preferred skills
  • VHDL
  • Vera
  • OVM
  • C, C++
  • PCI Express (Gen1, Gen2, PIPE, Serdes)
  • PCI. 1394
  • Verification of Serial bus, SPI, I2C, PWM, ADC, DAC
  • Ethernet (Layer2, layer3, layer4)
  • DDR-3, AXI-3. AXI-4,
  • Cache Architectures,
  • Formal verification using Conformal and/or Formality
  • Verification of mixed signal, and wireless communication ASICs
  • Lab experience with logic analyzers and oscilloscopes
  • Logic Synthesis: Design Compiler, Test Compiler, Prime Time, RC RTL compiler,
  • Revision Control Systems: perforce, svn, cvs, git, clearcase


Meridian Technology Group is committed to equal employment opportunity (EEO) and non-discrimination for all employees in all job classifications and for prospective employees without regard to race, color, religion, sex, age, sexual orientation, veteran status, physical or mental disability, national origin, or any other characteristic protected by applicable federal or state law. All hiring is contingent on eligibility to work in the United States. We are unable to sponsor applicants for work visas. No 3rd party companies/candidates.



Please email your resume now or
contact us for more details:
Meridian Technology Group Recruiting Team
(214)273-4497   (817)601-4651 in Texas
(800)698-0853 outside Texas
www.Meridiangroup.Com
jobs.Meridiangroup.Com

   
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